Integrated circuits are typically formed on substrates, particularly silicon wafers, by the sequential deposition of conductive, semiconductive or insulative layers. After each layer is deposited, the layer is etched to create circuitry features. As a series of layers are sequentially deposited and etched, the outer or uppermost surface of the substrate, i.e., the exposed surface of the substrate, becomes increasingly non-planar.
Chemical mechanical polishing (CMP) is one accepted method of planarizing a substrate surface. This planarization method typically requires that the substrate be mounted to a carrier or polishing head. The exposed surface of the substrate is then placed against a rotating polishing pad.
Some carrier heads include a flexible membrane with a mounting surface for the substrate. A chamber on the other side of the membrane can be pressurized to press the substrate against the polishing pad. A pneumatic control unit system outside the carrier head can control the pressure applied to the chamber, e.g., through pressure supply lines, in order to control the pressure applied to the substrate.